EGU24-10860, updated on 08 Mar 2024
https://doi.org/10.5194/egusphere-egu24-10860
EGU General Assembly 2024
© Author(s) 2024. This work is distributed under
the Creative Commons Attribution 4.0 License.

Performance portability across CPUs, GPUs and FPGAs for an unstructured grid shallow water model

Markus Büttner1, Christoph Alt2,3, Tobias Kenter3, and Vadym Aizinger1
Markus Büttner et al.
  • 1Mathematical Institute, University of Bayreuth, Bayreuth, Germany
  • 2Department Computer Science, Friedrich Alexander Universität, Erlangen, Germany
  • 3Paderborn Center for Parallel Computing, Paderborn University, Paderborn, Germany

By re-implementing our unstructured grid discontinuous Galerkin solver for the 2D shallow water equations in SYCL we produce a single code which not only runs on various CPUs and GPUs from AMD, Intel, and NVIDIA as well as on Intel Field Programmable Gate Arrays (FPGAs), but also achieves excellent performance on each of those architectures. The separation of concerns concept is realized in SYCL by using a modern C++ standard for model code implementation and handling all hardware-specifics automatically in the SYCL runtime. This makes this programming model very flexible in terms of data structures and algorithmic constructs and reduces the developer exposure to various hardware architectures with their differing performance optimization requirements. Furthermore, we demonstrate that the FPGAs, which consist of generic logic blocks configured for a specific code and data structures, outperform all other architectures for small-size problems if one uses the SYCL implementation provided by Intel oneAPI.

How to cite: Büttner, M., Alt, C., Kenter, T., and Aizinger, V.: Performance portability across CPUs, GPUs and FPGAs for an unstructured grid shallow water model, EGU General Assembly 2024, Vienna, Austria, 14–19 Apr 2024, EGU24-10860, https://doi.org/10.5194/egusphere-egu24-10860, 2024.